TECoSA seminar: Efficient Inference at the Edge
Date and time: 3 November 2022, 15:00 – 16:00 CET
Speaker: Axel Jantsch, Professor of systems on chips at TU Wien
Title: Efficient Inference at the Edge
Where: Hybrid event at Digital Futures hub, Osquars Backe 5, floor 2 at KTH main campus OR via Zoom
A maximum of 12 participants are onsite at Digital Futures conference room. The registration deadline is 31 October.
Please send a mail to Vicki Derbyshire if you would like to participate onsite: firstname.lastname@example.org
If you are unable to participate on-site, you are welcome to join us via Zoom:
This event is jointly organized by TECoSA and Digital Futures.
Abstract: The presentation will review the design space, trade-offs, and options for implementing Deep Neural Networks in resource-constrained embedded devices. Going into depth, the talk will present:
– a detailed, layer-wise power and delay profiling of neural network inference, and
– pruning-based network compression techniques.
Bio: Axel Jantsch received his PhD from TU Wien, Vienna, Austria, in 1992. From 2002 to 2014, he was a full professor in electronic systems design at KTH. Since 2014, he has been a Professor of systems on chips at TU Wien, Vienna, Austria. His current research interests include systems on chips, self-aware cyber-physical systems, and embedded machine learning.
Link to the homepage of Axel Jantsch: https://jantsch.se/AxelJantsch/HomePage/research.html